1. Field of the Invention
The present invention relates to a semiconductor memory device and a driving method thereof and in particular to an FBC (Floating Body Cell) memory that stores information by accumulating majority carriers in the floating body of a field effect transistor.
2. Related Art
SRAMs (Static Random Access Memories) used for cache memories in processors have problems of decreased operation margins because of low voltage operations and large DC consumption currents. If the thickness of gate oxide film of a transistor used in the processor is about 1 nm, a gate tunnel current cannot be ignored. In secondary cache memories expected to have a large capacity, DRAMs (Dynamic RAMs) are used instead of the SRAM or the gate oxide film of the SRAM is made thicker than that of the transistor in the processor.
However, the DRAM requires a refresh operation and cannot be accessed during the refresh operation. Its refresh busy rate is thus increased, resulting in a decrease in performance.